Rtd FPGA35S6100HR Bedienungsanleitung PDF herunterladen (Seite 6)

RTD Embedded Technologies, Inc. | www.rtd.com vi FPGA35S6 User’s Manual

Table of Figures

Figure 1: Board Dimensions ................................................................................................................................................................................... 10

Figure 2: Board Connections .................................................................................................................................................................................. 11

Figure 3: Bottom Solder Jumper Locations ............................................................................................................................................................ 12

Figure 4: Example 104™Stack ............................................................................................................................................................................... 16

Figure 5: IDAN Dimensions .................................................................................................................................................................................... 17

Figure 6: Example IDAN System ............................................................................................................................................................................ 22

Figure 7: FPGA35S6 Block Diagram ...................................................................................................................................................................... 23

Figure 8: CN4/CN9 Digital I/O Circuitry .................................................................................................................................................................. 24

Table of Tables

Table 1: Ordering Options ........................................................................................................................................................................................ 8

Table 2: Operating Conditions .................................................................................................................................................................................. 9

Table 3: Electrical Characteristics ............................................................................................................................................................................ 9

Table 4: CN3 Programming Header ....................................................................................................................................................................... 12

Table 5: CN8 I/O Pin Assignments ......................................................................................................................................................................... 13

Table 6: CN4 I/O Pin Assignments ......................................................................................................................................................................... 14

Table 7: CN9 I/O Pin Assignments ......................................................................................................................................................................... 14

Table 8: Pull up/Pull down Jumper options ............................................................................................................................................................ 14

Table 9: B1 Pull up Voltage .................................................................................................................................................................................... 15

Table 10: B2 Pull up Voltage .................................................................................................................................................................................. 15

Table 11: P2 and P3 Pin Assignments ................................................................................................................................................................... 18

Table 12: P4 Pin Assignments ................................................................................................................................................................................ 19

Table 13: Pull up/Pull down Jumper options .......................................................................................................................................................... 21

Table 14: B1 Pull up Voltage .................................................................................................................................................................................. 21

Table 15: B2 Pull up Voltage .................................................................................................................................................................................. 21

Table 16: FPGA Example Register Map................................................................................................................................................................. 25

1 2 3 4 5 6 7 8 9 10 11 ... 30 31

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